- VIA CPU
Overview at
CPUShack WinChip architecture at Sandpile.org
WinChip2
architecture at Sandpile.org
CPUPages W2B
Winchip W2, W2A, W2B UKcpu[usurped]...
- used
Socket 7 are the AMD K5 and K6, the
Cyrix 6x86 and 6x86MX, the IDT
WinChip, the
Intel P5
Pentium (2.5–3.5 V, 75–200 MHz), the
Pentium MMX (166–233 MHz)...
-
During the 1990s, VIA,
Transmeta and
other chip manufacturers also
produced IA-32
compatible processors (e.g.
WinChip). In the
modern era,
Intel still produced...
-
first socket to use a
staggered pin grid array, or SPGA,
which allowed the
chip's pins to be
spaced closer together than
earlier sockets.
Socket 5 was replaced...
- core was a
simpler design,
being an
evolution of the
WinChip processors (the
unreleased WinChip 4).
Samuel was
designed for
higher clock speeds, with...
-
worked at 266 MHz, and the
WinChip 2's PR
rating was
based upon the
performance of its AMD opponent.
Announced in 1998, the
chip never achieved widespread...
-
processor manufacturer ID strings: "AuthenticAMD" – AMD "CentaurHauls" – IDT
WinChip/Centaur (Including some VIA and
Zhaoxin CPUs) "CyrixInstead" – Cyrix/early...
- processors, some of the
final Cyrix M-II processors, some of the
final IDT
WinChip 2 processors, and Rise mP6 processors. It is
backward compatible with Socket...
-
mechanical retention while avoiding the risk of
bending pins when
inserting the
chip into the socket.
Certain devices use Ball Grid
Array (BGA) sockets, although...
- Book,
publication ID: 33234H,
February 2009,
section 8.3.4.3, p.648 IDT,
WinChip C6
Processor Data Sheet,
section A.2, p.79 Intel,
Quark SOC X1000 Core...
